Integrated circuit designers must often balance several competing objectives when designing a new integrated circuit. One such tradeoff exists between integrated circuit speed (e.g., maximum operating frequency) and power consumption. The reason for this tradeoff can be best understood by recognizing that the great majority of semiconductor devices in a typical digital logic integrated circuit are metal-oxide-semiconductor field effect transistors (MOSFETs). As a result, the maximum operating frequency and the power consumption characteristics of an integrated circuit tend to strongly depend on the speed and the power consumption characteristics of the MOSFETs constituting that integrated circuit.
Both the speed and power consumption characteristics of MOSFETs are dependent on threshold voltage. The speed of a MOSFET, for example, can be increased by decreasing its threshold voltage, Vt. The circuit delay, Td, of a MOSFET (i.e., the time that it takes a signal to propagate through the MOSFET) can be represented by:Td=C/(Vdd−Vt)n,where n is a number between 1 and 2 that indicates the deviation from the MOSFET square law due to velocity saturation, and c is a constant that depends upon the load capacitance, drive current, and supply voltage. The lower the threshold voltage, the shorter the circuit delay and the faster the MOSFET can be operated.
The power consumption, Pm, of a MOSFET in the off state, in contrast, can be approximated by:Pm=Vdd*Ist,where Vdd is the voltage applied to the MOSFET's drain and Ist is the subthreshold leakage current for the transistor (i.e., the current flowing in the transistor when the transistor is in the off state). Ist decreases exponentially with threshold voltage in accordance with:Ist=I0*10−Vt/s,where I0 is the current at Vgs=Vt, Vgs is the voltage difference between the gate and the source, and s is the subthreshold slope (i.e., the slope of the change in device current with gate voltage while the device is off). In this case, the higher the threshold voltage, the lower the subthreshold leakage current and the lower the power consumption of the MOSFET.
Because of these opposed dependencies of MOSFET speed and power consumption on threshold voltage, integrated circuit designers usually must design an integrated circuit with a particular application in mind. When designing for a portable, battery operated device such as a cellular telephone or personal digital assistant, for example, a designer will frequently choose a frequency-power solution that sacrifices higher maximum operating frequency for lower power consumption. The designer may do so by incorporating MOSFETs with relatively high threshold voltages into the design. On the other hand, when designing an integrated circuit for a computer system with a ready supply of power, a designer may choose to do just the opposite and sacrifice lower power consumption for higher maximum operating frequency. Here, the designer may incorporate MOSFETs with relatively low threshold voltages. Unfortunately, once a solution is chosen and an integrated circuit design has been tailored to meet specific maximum operating frequency and power consumption requirements, that design is not easily modified to achieve different frequency-power requirements. Making such modifications using conventional integrated circuit design methods typically requires that several steps in the design process be repeated for the new design, including determining the placement of cells, the routing of wires, and new signal timing. There is, as a result, little portability between designs tailored to one frequency-power solution and designs tailored to a different solution.
For the foregoing reason, there is a need for a low-cost method for efficiently modifying integrated circuit designs to achieve new maximum operating frequency targets.